Memory Interleave Enabler
for VIA Chipsets:
Technical notes

Copyright (C) 2001-2002, George E. Breese. All Rights Reserved.

Version 0.15 February 9, 2002

Important: This product CAN DAMAGE A COMPUTER.

License: This software is licensed, not sold. The author of this product has granted you a license to use this product, subject to the following conditions. By possessing, using, or attempting to use this product, you assume all liability for its use. You agree never to take legal action, civil or criminal, against its author for any reason. You may redistribute this product in its original form only. You may not charge money for distribution of the product, unless all such charges are remitted to the author immediately upon payment. The author retains ownership of all intellectual properties embodied in this product.

Revision History

Version 0.15 February 9, 2002

This is the current version.

More chipsets are supported.

A bug with the support for DDR SDRAM chipsets (e.g. KT266, Pro266, P4X266) has been fixed.

I added code to detect power events and reapply interleave settings when a power event occurs.

Version 0.14 May 5, 2001

More chipsets are supported. Every VIA chipset made since 1997 should be supported in this version.

This version will detect EDO and fast-page DRAM. It will only change interleave settings for SDRAM and DDR-SDRAM. This detection will only be done on chipsets that support EDO DRAM.

Version 0.12 April 2, 2001

This version is identical to v0.11 except that it enables three fewer features. These features did not seem to affect performance on a Pro133, but were possibly causing Pro133 motherboards to be less stable.

Support for KT133 and MVP4 chipsets is based on documentation only, and is untested. KX133 support was successful on a Biostar M7MKE, and resulted in a 32% improvement in SiSoft Sandra memory benchmark numbers.

NOTE: This version of the driver does not detect 16-megabit RAM, and always enables 4-way interleave in any SDRAM. VIA chipsets only support 2-way interleave on 16-megabit RAM modules.

Version 0.11 March 31, 2001

This version contained the first support for MVP3, MVP4, KX133, and KT133 chipsets. It detects and avoids interleaving "Fast Page" and EDO RAM, for which VIA has no support.

Support for KT133 and MVP4 chipsets is based on documentation only, and is untested.

This version of the driver had a potential bug. It set DRAM flags that may have caused memory to be less stable on Apollo Pro Plus and Pro133 series motherboards.

Version 0.1 February 28, 2001

This version was the initial release. It supported the VIA Apollo Pro133 and Pro133A chipsets only. It had the following known bugs:

Technical Information

The Apollo Pro series need more than just memory interleaving in order to maximize their memory performance. The following register settings are applied to all Apollo Pro-series chips by the driver:

The Super Socket 7 chipsets VP3, MVP3, MVP4 will also have read-around-write enabled.

In addition, all of the supported chipsets receive the following settings.

The driver reads PCI Device #0 and checks it for vendor ID and model ID before proceeding. The vendor ID is 0x1106 for VIA. The supported PCI model IDs are in tables within the README.HTM document.

This driver only changes the relevant bits of each register.

Contact Information

If you wish to offer feedback on this driver, send email to feedback@networking.tzo.com . Please note that I do not check this mailbox frequently, and I do not answer questions about installation or use of this driver.